# HDLBits-Solutions-Verilog

**Repository Path**: cauc_bin_xu/HDLBits-Solutions-Verilog

## Basic Information

- **Project Name**: HDLBits-Solutions-Verilog
- **Description**: No description available
- **Primary Language**: Verilog
- **License**: Not specified
- **Default Branch**: master
- **Homepage**: None
- **GVP Project**: No

## Statistics

- **Stars**: 0
- **Forks**: 0
- **Created**: 2021-12-25
- **Last Updated**: 2021-12-25

## Categories & Tags

**Categories**: Uncategorized

**Tags**: None

## README

# __Solutions of HDLBits Problems - Verilog Practice__

HDLBits is a collection of small circuit design exercises for practicing digital hardware design using Verilog Hardware Description Language.

_( Main Page : https://hdlbits.01xz.net/wiki/Main_Page )_

This repository contains my own solutions of all 178 problems on the website. The problems are not very complicated and friendly for beginners. I've been trying to find the simplest solution of each problem as much as I can. If you have a different solution of any problem, feel free to discuss with me.

## __Contents__

### __Getting Started__
2 problems in total (1-2). An easy start.

### __Verilog Language__
41 problems in total (3-43). Focus on Verilog syntax.

### __Circuits__
115 problems in total (44-158). Some typical circuits implemented by combinational or sequential logic, including multiplexers, adders, flip-flops, counters, shift registers, state machines, etc.

### __Verification: Reading Simulations__
15 problems in total (159-173). Focus on reading simulation waveforms.

### __Verification: Writing Testbenches__
5 problems in total (174-178). Easy testbench writing.