/* Verilog netlist generated by SCUBA Diamond (64-bit) 3.11.0.396.4 */
/* Module Version: 1.6 */
/* C:\lscc\diamond\3.11_x64\ispfpga\bin\nt64\scuba.exe -w -n SinCos -lang verilog -synth lse -bus_exp 7 -bb -arch xo2c00 -type cosine -addr_width 8 -width 13 -pfu -input_reg -mode 2 -output_reg -area -pipeline 1  */
/* Sat Jan 11 17:46:30 2020 */


`timescale 1 ns / 1 ps
module SinCos (Clock, ClkEn, Reset, Theta, Sine, Cosine)/* synthesis NGD_DRC_MASK=1 */;
    input wire Clock;
    input wire ClkEn;
    input wire Reset;
    input wire [7:0] Theta;
    output wire [12:0] Sine;
    output wire [12:0] Cosine;

    wire func_or_inet;
    wire lx_ne0;
    wire lx_ne0_inv;
    wire mx_ctrl_r_1_inv;
    wire rom_addr0_r;
    wire rom_addr0_r_1;
    wire rom_addr0_r_2;
    wire rom_addr0_r_3;
    wire rom_addr0_r_4;
    wire mx_ctrl_r;
    wire rom_addr0_r_5;
    wire cosromoutsel_i;
    wire rom_dout;
    wire rom_dout_1;
    wire rom_dout_2;
    wire rom_dout_3;
    wire rom_dout_4;
    wire rom_dout_5;
    wire rom_dout_6;
    wire rom_dout_7;
    wire rom_dout_8;
    wire rom_dout_9;
    wire rom_dout_10;
    wire rom_dout_11;
    wire sinromoutsel;
    wire rom_dout_12;
    wire rom_dout_13;
    wire rom_dout_14;
    wire rom_dout_15;
    wire rom_dout_16;
    wire rom_dout_17;
    wire rom_dout_18;
    wire rom_dout_19;
    wire rom_dout_20;
    wire rom_dout_21;
    wire rom_dout_22;
    wire rom_dout_23;
    wire rom_dout_24;
    wire cosromoutsel;
    wire rom_dout_25;
    wire out_sel_i;
    wire rom_dout_s;
    wire rom_dout_s_1;
    wire rom_dout_s_2;
    wire rom_dout_s_3;
    wire rom_dout_s_4;
    wire rom_dout_s_5;
    wire rom_dout_s_6;
    wire rom_dout_s_7;
    wire rom_dout_s_8;
    wire rom_dout_s_9;
    wire rom_dout_s_10;
    wire rom_dout_s_11;
    wire mx_ctrl_r_1;
    wire rom_dout_s_12;
    wire rom_dout_c;
    wire rom_dout_c_1;
    wire rom_dout_c_2;
    wire rom_dout_c_3;
    wire rom_dout_c_4;
    wire rom_dout_c_5;
    wire rom_dout_c_6;
    wire rom_dout_c_7;
    wire rom_dout_c_8;
    wire rom_dout_c_9;
    wire rom_dout_c_10;
    wire rom_dout_c_11;
    wire out_sel;
    wire rom_dout_c_12;
    wire sinout_pre;
    wire sinout_pre_1;
    wire sinout_pre_2;
    wire sinout_pre_3;
    wire sinout_pre_4;
    wire sinout_pre_5;
    wire sinout_pre_6;
    wire sinout_pre_7;
    wire sinout_pre_8;
    wire sinout_pre_9;
    wire sinout_pre_10;
    wire sinout_pre_11;
    wire sinout_pre_12;
    wire cosout_pre;
    wire cosout_pre_1;
    wire cosout_pre_2;
    wire cosout_pre_3;
    wire cosout_pre_4;
    wire cosout_pre_5;
    wire cosout_pre_6;
    wire cosout_pre_7;
    wire cosout_pre_8;
    wire cosout_pre_9;
    wire cosout_pre_10;
    wire cosout_pre_11;
    wire cosout_pre_12;
    wire rom_addr0_r_n;
    wire rom_addr0_r_inv;
    wire rom_addr0_r_n_1;
    wire rom_addr0_r_n_2;
    wire co0;
    wire rom_addr0_r_1_inv;
    wire rom_addr0_r_2_inv;
    wire rom_addr0_r_n_3;
    wire rom_addr0_r_n_4;
    wire co1;
    wire rom_addr0_r_3_inv;
    wire rom_addr0_r_4_inv;
    wire rom_addr0_r_n_5;
    wire co2;
    wire rom_addr0_r_5_inv;
    wire rom_dout_12_ffin;
    wire rom_dout_11_ffin;
    wire rom_dout_10_ffin;
    wire rom_dout_9_ffin;
    wire rom_dout_8_ffin;
    wire rom_dout_7_ffin;
    wire rom_dout_6_ffin;
    wire rom_dout_5_ffin;
    wire rom_dout_4_ffin;
    wire rom_dout_3_ffin;
    wire rom_dout_2_ffin;
    wire rom_dout_1_ffin;
    wire rom_dout_ffin;
    wire rom_dout_25_ffin;
    wire rom_dout_24_ffin;
    wire rom_dout_23_ffin;
    wire rom_dout_22_ffin;
    wire rom_dout_21_ffin;
    wire rom_dout_20_ffin;
    wire rom_dout_19_ffin;
    wire rom_dout_18_ffin;
    wire rom_dout_17_ffin;
    wire rom_dout_16_ffin;
    wire rom_dout_15_ffin;
    wire rom_dout_14_ffin;
    wire rom_dout_13_ffin;
    wire rom_addr0_r_6;
    wire rom_addr0_r_7;
    wire rom_addr0_r_8;
    wire rom_addr0_r_9;
    wire rom_addr0_r_10;
    wire rom_addr0_r_11;
    wire rom_dout_s_n;
    wire rom_dout_inv;
    wire rom_dout_s_n_1;
    wire rom_dout_s_n_2;
    wire co0_1;
    wire rom_dout_1_inv;
    wire rom_dout_2_inv;
    wire rom_dout_s_n_3;
    wire rom_dout_s_n_4;
    wire co1_1;
    wire rom_dout_3_inv;
    wire rom_dout_4_inv;
    wire rom_dout_s_n_5;
    wire rom_dout_s_n_6;
    wire co2_1;
    wire rom_dout_5_inv;
    wire rom_dout_6_inv;
    wire rom_dout_s_n_7;
    wire rom_dout_s_n_8;
    wire co3;
    wire rom_dout_7_inv;
    wire rom_dout_8_inv;
    wire rom_dout_s_n_9;
    wire rom_dout_s_n_10;
    wire co4;
    wire rom_dout_9_inv;
    wire rom_dout_10_inv;
    wire rom_dout_s_n_11;
    wire rom_dout_s_n_12;
    wire co5;
    wire rom_dout_11_inv;
    wire rom_dout_12_inv;
    wire co6d;
    wire co6;
    wire rom_dout_c_n;
    wire scuba_vhi;
    wire rom_dout_13_inv;
    wire rom_dout_c_n_1;
    wire rom_dout_c_n_2;
    wire co0_2;
    wire rom_dout_14_inv;
    wire rom_dout_15_inv;
    wire rom_dout_c_n_3;
    wire rom_dout_c_n_4;
    wire co1_2;
    wire rom_dout_16_inv;
    wire rom_dout_17_inv;
    wire rom_dout_c_n_5;
    wire rom_dout_c_n_6;
    wire co2_2;
    wire rom_dout_18_inv;
    wire rom_dout_19_inv;
    wire rom_dout_c_n_7;
    wire rom_dout_c_n_8;
    wire co3_1;
    wire rom_dout_20_inv;
    wire rom_dout_21_inv;
    wire rom_dout_c_n_9;
    wire rom_dout_c_n_10;
    wire co4_1;
    wire rom_dout_22_inv;
    wire rom_dout_23_inv;
    wire rom_dout_c_n_11;
    wire rom_dout_c_n_12;
    wire co5_1;
    wire rom_dout_24_inv;
    wire rom_dout_25_inv;
    wire co6_1d;
    wire co6_1;
    wire scuba_vlo;

    INV INV_33 (.A(rom_addr0_r_5), .Z(rom_addr0_r_5_inv));

    INV INV_32 (.A(rom_addr0_r_4), .Z(rom_addr0_r_4_inv));

    INV INV_31 (.A(rom_addr0_r_3), .Z(rom_addr0_r_3_inv));

    INV INV_30 (.A(rom_addr0_r_2), .Z(rom_addr0_r_2_inv));

    INV INV_29 (.A(rom_addr0_r_1), .Z(rom_addr0_r_1_inv));

    INV INV_28 (.A(rom_addr0_r), .Z(rom_addr0_r_inv));

    XOR2 XOR2_t1 (.A(mx_ctrl_r), .B(mx_ctrl_r_1), .Z(cosromoutsel_i));

    INV INV_27 (.A(rom_dout_12), .Z(rom_dout_12_inv));

    INV INV_26 (.A(rom_dout_11), .Z(rom_dout_11_inv));

    INV INV_25 (.A(rom_dout_10), .Z(rom_dout_10_inv));

    INV INV_24 (.A(rom_dout_9), .Z(rom_dout_9_inv));

    INV INV_23 (.A(rom_dout_8), .Z(rom_dout_8_inv));

    INV INV_22 (.A(rom_dout_7), .Z(rom_dout_7_inv));

    INV INV_21 (.A(rom_dout_6), .Z(rom_dout_6_inv));

    INV INV_20 (.A(rom_dout_5), .Z(rom_dout_5_inv));

    INV INV_19 (.A(rom_dout_4), .Z(rom_dout_4_inv));

    INV INV_18 (.A(rom_dout_3), .Z(rom_dout_3_inv));

    INV INV_17 (.A(rom_dout_2), .Z(rom_dout_2_inv));

    INV INV_16 (.A(rom_dout_1), .Z(rom_dout_1_inv));

    INV INV_15 (.A(rom_dout), .Z(rom_dout_inv));

    INV INV_14 (.A(rom_dout_25), .Z(rom_dout_25_inv));

    INV INV_13 (.A(rom_dout_24), .Z(rom_dout_24_inv));

    INV INV_12 (.A(rom_dout_23), .Z(rom_dout_23_inv));

    INV INV_11 (.A(rom_dout_22), .Z(rom_dout_22_inv));

    INV INV_10 (.A(rom_dout_21), .Z(rom_dout_21_inv));

    INV INV_9 (.A(rom_dout_20), .Z(rom_dout_20_inv));

    INV INV_8 (.A(rom_dout_19), .Z(rom_dout_19_inv));

    INV INV_7 (.A(rom_dout_18), .Z(rom_dout_18_inv));

    INV INV_6 (.A(rom_dout_17), .Z(rom_dout_17_inv));

    INV INV_5 (.A(rom_dout_16), .Z(rom_dout_16_inv));

    INV INV_4 (.A(rom_dout_15), .Z(rom_dout_15_inv));

    INV INV_3 (.A(rom_dout_14), .Z(rom_dout_14_inv));

    INV INV_2 (.A(rom_dout_13), .Z(rom_dout_13_inv));

    defparam LUT4_1.initval =  16'hfffe ;
    ROM16X1A LUT4_1 (.AD3(rom_addr0_r_6), .AD2(rom_addr0_r_7), .AD1(rom_addr0_r_8), 
        .AD0(rom_addr0_r_9), .DO0(func_or_inet));

    defparam LUT4_0.initval =  16'hfffe ;
    ROM16X1A LUT4_0 (.AD3(func_or_inet), .AD2(rom_addr0_r_10), .AD1(rom_addr0_r_11), 
        .AD0(scuba_vlo), .DO0(lx_ne0));

    INV INV_1 (.A(lx_ne0), .Z(lx_ne0_inv));

    AND2 AND2_t0 (.A(mx_ctrl_r), .B(lx_ne0_inv), .Z(out_sel_i));

    INV INV_0 (.A(mx_ctrl_r_1), .Z(mx_ctrl_r_1_inv));

    FD1P3DX FF_62 (.D(Theta[0]), .SP(ClkEn), .CK(Clock), .CD(Reset), .Q(rom_addr0_r))
             /* synthesis GSR="ENABLED" */;

    FD1P3DX FF_61 (.D(Theta[1]), .SP(ClkEn), .CK(Clock), .CD(Reset), .Q(rom_addr0_r_1))
             /* synthesis GSR="ENABLED" */;

    FD1P3DX FF_60 (.D(Theta[2]), .SP(ClkEn), .CK(Clock), .CD(Reset), .Q(rom_addr0_r_2))
             /* synthesis GSR="ENABLED" */;

    FD1P3DX FF_59 (.D(Theta[3]), .SP(ClkEn), .CK(Clock), .CD(Reset), .Q(rom_addr0_r_3))
             /* synthesis GSR="ENABLED" */;

    FD1P3DX FF_58 (.D(Theta[4]), .SP(ClkEn), .CK(Clock), .CD(Reset), .Q(rom_addr0_r_4))
             /* synthesis GSR="ENABLED" */;

    FD1P3DX FF_57 (.D(Theta[5]), .SP(ClkEn), .CK(Clock), .CD(Reset), .Q(rom_addr0_r_5))
             /* synthesis GSR="ENABLED" */;

    FD1P3DX FF_56 (.D(Theta[6]), .SP(ClkEn), .CK(Clock), .CD(Reset), .Q(mx_ctrl_r))
             /* synthesis GSR="ENABLED" */;

    FD1P3DX FF_55 (.D(Theta[7]), .SP(ClkEn), .CK(Clock), .CD(Reset), .Q(mx_ctrl_r_1))
             /* synthesis GSR="ENABLED" */;

    MUX21 muxb_57 (.D0(rom_addr0_r), .D1(rom_addr0_r_n), .SD(mx_ctrl_r), 
        .Z(rom_addr0_r_6));

    MUX21 muxb_56 (.D0(rom_addr0_r_1), .D1(rom_addr0_r_n_1), .SD(mx_ctrl_r), 
        .Z(rom_addr0_r_7));

    MUX21 muxb_55 (.D0(rom_addr0_r_2), .D1(rom_addr0_r_n_2), .SD(mx_ctrl_r), 
        .Z(rom_addr0_r_8));

    MUX21 muxb_54 (.D0(rom_addr0_r_3), .D1(rom_addr0_r_n_3), .SD(mx_ctrl_r), 
        .Z(rom_addr0_r_9));

    MUX21 muxb_53 (.D0(rom_addr0_r_4), .D1(rom_addr0_r_n_4), .SD(mx_ctrl_r), 
        .Z(rom_addr0_r_10));

    MUX21 muxb_52 (.D0(rom_addr0_r_5), .D1(rom_addr0_r_n_5), .SD(mx_ctrl_r), 
        .Z(rom_addr0_r_11));

    FD1P3DX FF_54 (.D(rom_dout_12_ffin), .SP(ClkEn), .CK(Clock), .CD(Reset), 
        .Q(rom_dout_12))
             /* synthesis GSR="ENABLED" */;

    FD1P3DX FF_53 (.D(rom_dout_11_ffin), .SP(ClkEn), .CK(Clock), .CD(Reset), 
        .Q(rom_dout_11))
             /* synthesis GSR="ENABLED" */;

    FD1P3DX FF_52 (.D(rom_dout_10_ffin), .SP(ClkEn), .CK(Clock), .CD(Reset), 
        .Q(rom_dout_10))
             /* synthesis GSR="ENABLED" */;

    FD1P3DX FF_51 (.D(rom_dout_9_ffin), .SP(ClkEn), .CK(Clock), .CD(Reset), 
        .Q(rom_dout_9))
             /* synthesis GSR="ENABLED" */;

    FD1P3DX FF_50 (.D(rom_dout_8_ffin), .SP(ClkEn), .CK(Clock), .CD(Reset), 
        .Q(rom_dout_8))
             /* synthesis GSR="ENABLED" */;

    FD1P3DX FF_49 (.D(rom_dout_7_ffin), .SP(ClkEn), .CK(Clock), .CD(Reset), 
        .Q(rom_dout_7))
             /* synthesis GSR="ENABLED" */;

    FD1P3DX FF_48 (.D(rom_dout_6_ffin), .SP(ClkEn), .CK(Clock), .CD(Reset), 
        .Q(rom_dout_6))
             /* synthesis GSR="ENABLED" */;

    FD1P3DX FF_47 (.D(rom_dout_5_ffin), .SP(ClkEn), .CK(Clock), .CD(Reset), 
        .Q(rom_dout_5))
             /* synthesis GSR="ENABLED" */;

    FD1P3DX FF_46 (.D(rom_dout_4_ffin), .SP(ClkEn), .CK(Clock), .CD(Reset), 
        .Q(rom_dout_4))
             /* synthesis GSR="ENABLED" */;

    FD1P3DX FF_45 (.D(rom_dout_3_ffin), .SP(ClkEn), .CK(Clock), .CD(Reset), 
        .Q(rom_dout_3))
             /* synthesis GSR="ENABLED" */;

    FD1P3DX FF_44 (.D(rom_dout_2_ffin), .SP(ClkEn), .CK(Clock), .CD(Reset), 
        .Q(rom_dout_2))
             /* synthesis GSR="ENABLED" */;

    FD1P3DX FF_43 (.D(rom_dout_1_ffin), .SP(ClkEn), .CK(Clock), .CD(Reset), 
        .Q(rom_dout_1))
             /* synthesis GSR="ENABLED" */;

    FD1P3DX FF_42 (.D(rom_dout_ffin), .SP(ClkEn), .CK(Clock), .CD(Reset), 
        .Q(rom_dout))
             /* synthesis GSR="ENABLED" */;

    FD1P3DX FF_41 (.D(rom_dout_25_ffin), .SP(ClkEn), .CK(Clock), .CD(Reset), 
        .Q(rom_dout_25))
             /* synthesis GSR="ENABLED" */;

    FD1P3DX FF_40 (.D(rom_dout_24_ffin), .SP(ClkEn), .CK(Clock), .CD(Reset), 
        .Q(rom_dout_24))
             /* synthesis GSR="ENABLED" */;

    FD1P3DX FF_39 (.D(rom_dout_23_ffin), .SP(ClkEn), .CK(Clock), .CD(Reset), 
        .Q(rom_dout_23))
             /* synthesis GSR="ENABLED" */;

    FD1P3DX FF_38 (.D(rom_dout_22_ffin), .SP(ClkEn), .CK(Clock), .CD(Reset), 
        .Q(rom_dout_22))
             /* synthesis GSR="ENABLED" */;

    FD1P3DX FF_37 (.D(rom_dout_21_ffin), .SP(ClkEn), .CK(Clock), .CD(Reset), 
        .Q(rom_dout_21))
             /* synthesis GSR="ENABLED" */;

    FD1P3DX FF_36 (.D(rom_dout_20_ffin), .SP(ClkEn), .CK(Clock), .CD(Reset), 
        .Q(rom_dout_20))
             /* synthesis GSR="ENABLED" */;

    FD1P3DX FF_35 (.D(rom_dout_19_ffin), .SP(ClkEn), .CK(Clock), .CD(Reset), 
        .Q(rom_dout_19))
             /* synthesis GSR="ENABLED" */;

    FD1P3DX FF_34 (.D(rom_dout_18_ffin), .SP(ClkEn), .CK(Clock), .CD(Reset), 
        .Q(rom_dout_18))
             /* synthesis GSR="ENABLED" */;

    FD1P3DX FF_33 (.D(rom_dout_17_ffin), .SP(ClkEn), .CK(Clock), .CD(Reset), 
        .Q(rom_dout_17))
             /* synthesis GSR="ENABLED" */;

    FD1P3DX FF_32 (.D(rom_dout_16_ffin), .SP(ClkEn), .CK(Clock), .CD(Reset), 
        .Q(rom_dout_16))
             /* synthesis GSR="ENABLED" */;

    FD1P3DX FF_31 (.D(rom_dout_15_ffin), .SP(ClkEn), .CK(Clock), .CD(Reset), 
        .Q(rom_dout_15))
             /* synthesis GSR="ENABLED" */;

    FD1P3DX FF_30 (.D(rom_dout_14_ffin), .SP(ClkEn), .CK(Clock), .CD(Reset), 
        .Q(rom_dout_14))
             /* synthesis GSR="ENABLED" */;

    FD1P3DX FF_29 (.D(rom_dout_13_ffin), .SP(ClkEn), .CK(Clock), .CD(Reset), 
        .Q(rom_dout_13))
             /* synthesis GSR="ENABLED" */;

    FD1P3DX FF_28 (.D(cosromoutsel_i), .SP(ClkEn), .CK(Clock), .CD(Reset), 
        .Q(cosromoutsel))
             /* synthesis GSR="ENABLED" */;

    FD1P3DX FF_27 (.D(mx_ctrl_r_1), .SP(ClkEn), .CK(Clock), .CD(Reset), 
        .Q(sinromoutsel))
             /* synthesis GSR="ENABLED" */;

    MUX21 muxb_51 (.D0(rom_dout), .D1(rom_dout_s_n), .SD(sinromoutsel), 
        .Z(rom_dout_s));

    MUX21 muxb_50 (.D0(rom_dout_1), .D1(rom_dout_s_n_1), .SD(sinromoutsel), 
        .Z(rom_dout_s_1));

    MUX21 muxb_49 (.D0(rom_dout_2), .D1(rom_dout_s_n_2), .SD(sinromoutsel), 
        .Z(rom_dout_s_2));

    MUX21 muxb_48 (.D0(rom_dout_3), .D1(rom_dout_s_n_3), .SD(sinromoutsel), 
        .Z(rom_dout_s_3));

    MUX21 muxb_47 (.D0(rom_dout_4), .D1(rom_dout_s_n_4), .SD(sinromoutsel), 
        .Z(rom_dout_s_4));

    MUX21 muxb_46 (.D0(rom_dout_5), .D1(rom_dout_s_n_5), .SD(sinromoutsel), 
        .Z(rom_dout_s_5));

    MUX21 muxb_45 (.D0(rom_dout_6), .D1(rom_dout_s_n_6), .SD(sinromoutsel), 
        .Z(rom_dout_s_6));

    MUX21 muxb_44 (.D0(rom_dout_7), .D1(rom_dout_s_n_7), .SD(sinromoutsel), 
        .Z(rom_dout_s_7));

    MUX21 muxb_43 (.D0(rom_dout_8), .D1(rom_dout_s_n_8), .SD(sinromoutsel), 
        .Z(rom_dout_s_8));

    MUX21 muxb_42 (.D0(rom_dout_9), .D1(rom_dout_s_n_9), .SD(sinromoutsel), 
        .Z(rom_dout_s_9));

    MUX21 muxb_41 (.D0(rom_dout_10), .D1(rom_dout_s_n_10), .SD(sinromoutsel), 
        .Z(rom_dout_s_10));

    MUX21 muxb_40 (.D0(rom_dout_11), .D1(rom_dout_s_n_11), .SD(sinromoutsel), 
        .Z(rom_dout_s_11));

    MUX21 muxb_39 (.D0(rom_dout_12), .D1(rom_dout_s_n_12), .SD(sinromoutsel), 
        .Z(rom_dout_s_12));

    MUX21 muxb_38 (.D0(rom_dout_13), .D1(rom_dout_c_n), .SD(cosromoutsel), 
        .Z(rom_dout_c));

    MUX21 muxb_37 (.D0(rom_dout_14), .D1(rom_dout_c_n_1), .SD(cosromoutsel), 
        .Z(rom_dout_c_1));

    MUX21 muxb_36 (.D0(rom_dout_15), .D1(rom_dout_c_n_2), .SD(cosromoutsel), 
        .Z(rom_dout_c_2));

    MUX21 muxb_35 (.D0(rom_dout_16), .D1(rom_dout_c_n_3), .SD(cosromoutsel), 
        .Z(rom_dout_c_3));

    MUX21 muxb_34 (.D0(rom_dout_17), .D1(rom_dout_c_n_4), .SD(cosromoutsel), 
        .Z(rom_dout_c_4));

    MUX21 muxb_33 (.D0(rom_dout_18), .D1(rom_dout_c_n_5), .SD(cosromoutsel), 
        .Z(rom_dout_c_5));

    MUX21 muxb_32 (.D0(rom_dout_19), .D1(rom_dout_c_n_6), .SD(cosromoutsel), 
        .Z(rom_dout_c_6));

    MUX21 muxb_31 (.D0(rom_dout_20), .D1(rom_dout_c_n_7), .SD(cosromoutsel), 
        .Z(rom_dout_c_7));

    MUX21 muxb_30 (.D0(rom_dout_21), .D1(rom_dout_c_n_8), .SD(cosromoutsel), 
        .Z(rom_dout_c_8));

    MUX21 muxb_29 (.D0(rom_dout_22), .D1(rom_dout_c_n_9), .SD(cosromoutsel), 
        .Z(rom_dout_c_9));

    MUX21 muxb_28 (.D0(rom_dout_23), .D1(rom_dout_c_n_10), .SD(cosromoutsel), 
        .Z(rom_dout_c_10));

    MUX21 muxb_27 (.D0(rom_dout_24), .D1(rom_dout_c_n_11), .SD(cosromoutsel), 
        .Z(rom_dout_c_11));

    MUX21 muxb_26 (.D0(rom_dout_25), .D1(rom_dout_c_n_12), .SD(cosromoutsel), 
        .Z(rom_dout_c_12));

    FD1P3DX FF_26 (.D(out_sel_i), .SP(ClkEn), .CK(Clock), .CD(Reset), .Q(out_sel))
             /* synthesis GSR="ENABLED" */;

    MUX21 muxb_25 (.D0(rom_dout_s), .D1(scuba_vlo), .SD(out_sel), .Z(sinout_pre));

    MUX21 muxb_24 (.D0(rom_dout_s_1), .D1(scuba_vlo), .SD(out_sel), .Z(sinout_pre_1));

    MUX21 muxb_23 (.D0(rom_dout_s_2), .D1(scuba_vlo), .SD(out_sel), .Z(sinout_pre_2));

    MUX21 muxb_22 (.D0(rom_dout_s_3), .D1(scuba_vlo), .SD(out_sel), .Z(sinout_pre_3));

    MUX21 muxb_21 (.D0(rom_dout_s_4), .D1(scuba_vlo), .SD(out_sel), .Z(sinout_pre_4));

    MUX21 muxb_20 (.D0(rom_dout_s_5), .D1(scuba_vlo), .SD(out_sel), .Z(sinout_pre_5));

    MUX21 muxb_19 (.D0(rom_dout_s_6), .D1(scuba_vlo), .SD(out_sel), .Z(sinout_pre_6));

    MUX21 muxb_18 (.D0(rom_dout_s_7), .D1(scuba_vlo), .SD(out_sel), .Z(sinout_pre_7));

    MUX21 muxb_17 (.D0(rom_dout_s_8), .D1(scuba_vlo), .SD(out_sel), .Z(sinout_pre_8));

    MUX21 muxb_16 (.D0(rom_dout_s_9), .D1(scuba_vlo), .SD(out_sel), .Z(sinout_pre_9));

    MUX21 muxb_15 (.D0(rom_dout_s_10), .D1(scuba_vlo), .SD(out_sel), .Z(sinout_pre_10));

    MUX21 muxb_14 (.D0(rom_dout_s_11), .D1(scuba_vhi), .SD(out_sel), .Z(sinout_pre_11));

    MUX21 muxb_13 (.D0(rom_dout_s_12), .D1(mx_ctrl_r_1), .SD(out_sel), .Z(sinout_pre_12));

    MUX21 muxb_12 (.D0(rom_dout_c), .D1(scuba_vlo), .SD(out_sel), .Z(cosout_pre));

    MUX21 muxb_11 (.D0(rom_dout_c_1), .D1(scuba_vlo), .SD(out_sel), .Z(cosout_pre_1));

    MUX21 muxb_10 (.D0(rom_dout_c_2), .D1(scuba_vlo), .SD(out_sel), .Z(cosout_pre_2));

    MUX21 muxb_9 (.D0(rom_dout_c_3), .D1(scuba_vlo), .SD(out_sel), .Z(cosout_pre_3));

    MUX21 muxb_8 (.D0(rom_dout_c_4), .D1(scuba_vlo), .SD(out_sel), .Z(cosout_pre_4));

    MUX21 muxb_7 (.D0(rom_dout_c_5), .D1(scuba_vlo), .SD(out_sel), .Z(cosout_pre_5));

    MUX21 muxb_6 (.D0(rom_dout_c_6), .D1(scuba_vlo), .SD(out_sel), .Z(cosout_pre_6));

    MUX21 muxb_5 (.D0(rom_dout_c_7), .D1(scuba_vlo), .SD(out_sel), .Z(cosout_pre_7));

    MUX21 muxb_4 (.D0(rom_dout_c_8), .D1(scuba_vlo), .SD(out_sel), .Z(cosout_pre_8));

    MUX21 muxb_3 (.D0(rom_dout_c_9), .D1(scuba_vlo), .SD(out_sel), .Z(cosout_pre_9));

    MUX21 muxb_2 (.D0(rom_dout_c_10), .D1(scuba_vlo), .SD(out_sel), .Z(cosout_pre_10));

    MUX21 muxb_1 (.D0(rom_dout_c_11), .D1(scuba_vlo), .SD(out_sel), .Z(cosout_pre_11));

    MUX21 muxb_0 (.D0(rom_dout_c_12), .D1(scuba_vlo), .SD(out_sel), .Z(cosout_pre_12));

    FD1P3DX FF_25 (.D(sinout_pre), .SP(ClkEn), .CK(Clock), .CD(Reset), .Q(Sine[0]))
             /* synthesis GSR="ENABLED" */;

    FD1P3DX FF_24 (.D(sinout_pre_1), .SP(ClkEn), .CK(Clock), .CD(Reset), 
        .Q(Sine[1]))
             /* synthesis GSR="ENABLED" */;

    FD1P3DX FF_23 (.D(sinout_pre_2), .SP(ClkEn), .CK(Clock), .CD(Reset), 
        .Q(Sine[2]))
             /* synthesis GSR="ENABLED" */;

    FD1P3DX FF_22 (.D(sinout_pre_3), .SP(ClkEn), .CK(Clock), .CD(Reset), 
        .Q(Sine[3]))
             /* synthesis GSR="ENABLED" */;

    FD1P3DX FF_21 (.D(sinout_pre_4), .SP(ClkEn), .CK(Clock), .CD(Reset), 
        .Q(Sine[4]))
             /* synthesis GSR="ENABLED" */;

    FD1P3DX FF_20 (.D(sinout_pre_5), .SP(ClkEn), .CK(Clock), .CD(Reset), 
        .Q(Sine[5]))
             /* synthesis GSR="ENABLED" */;

    FD1P3DX FF_19 (.D(sinout_pre_6), .SP(ClkEn), .CK(Clock), .CD(Reset), 
        .Q(Sine[6]))
             /* synthesis GSR="ENABLED" */;

    FD1P3DX FF_18 (.D(sinout_pre_7), .SP(ClkEn), .CK(Clock), .CD(Reset), 
        .Q(Sine[7]))
             /* synthesis GSR="ENABLED" */;

    FD1P3DX FF_17 (.D(sinout_pre_8), .SP(ClkEn), .CK(Clock), .CD(Reset), 
        .Q(Sine[8]))
             /* synthesis GSR="ENABLED" */;

    FD1P3DX FF_16 (.D(sinout_pre_9), .SP(ClkEn), .CK(Clock), .CD(Reset), 
        .Q(Sine[9]))
             /* synthesis GSR="ENABLED" */;

    FD1P3DX FF_15 (.D(sinout_pre_10), .SP(ClkEn), .CK(Clock), .CD(Reset), 
        .Q(Sine[10]))
             /* synthesis GSR="ENABLED" */;

    FD1P3DX FF_14 (.D(sinout_pre_11), .SP(ClkEn), .CK(Clock), .CD(Reset), 
        .Q(Sine[11]))
             /* synthesis GSR="ENABLED" */;

    FD1P3DX FF_13 (.D(sinout_pre_12), .SP(ClkEn), .CK(Clock), .CD(Reset), 
        .Q(Sine[12]))
             /* synthesis GSR="ENABLED" */;

    FD1P3DX FF_12 (.D(cosout_pre), .SP(ClkEn), .CK(Clock), .CD(Reset), .Q(Cosine[0]))
             /* synthesis GSR="ENABLED" */;

    FD1P3DX FF_11 (.D(cosout_pre_1), .SP(ClkEn), .CK(Clock), .CD(Reset), 
        .Q(Cosine[1]))
             /* synthesis GSR="ENABLED" */;

    FD1P3DX FF_10 (.D(cosout_pre_2), .SP(ClkEn), .CK(Clock), .CD(Reset), 
        .Q(Cosine[2]))
             /* synthesis GSR="ENABLED" */;

    FD1P3DX FF_9 (.D(cosout_pre_3), .SP(ClkEn), .CK(Clock), .CD(Reset), 
        .Q(Cosine[3]))
             /* synthesis GSR="ENABLED" */;

    FD1P3DX FF_8 (.D(cosout_pre_4), .SP(ClkEn), .CK(Clock), .CD(Reset), 
        .Q(Cosine[4]))
             /* synthesis GSR="ENABLED" */;

    FD1P3DX FF_7 (.D(cosout_pre_5), .SP(ClkEn), .CK(Clock), .CD(Reset), 
        .Q(Cosine[5]))
             /* synthesis GSR="ENABLED" */;

    FD1P3DX FF_6 (.D(cosout_pre_6), .SP(ClkEn), .CK(Clock), .CD(Reset), 
        .Q(Cosine[6]))
             /* synthesis GSR="ENABLED" */;

    FD1P3DX FF_5 (.D(cosout_pre_7), .SP(ClkEn), .CK(Clock), .CD(Reset), 
        .Q(Cosine[7]))
             /* synthesis GSR="ENABLED" */;

    FD1P3DX FF_4 (.D(cosout_pre_8), .SP(ClkEn), .CK(Clock), .CD(Reset), 
        .Q(Cosine[8]))
             /* synthesis GSR="ENABLED" */;

    FD1P3DX FF_3 (.D(cosout_pre_9), .SP(ClkEn), .CK(Clock), .CD(Reset), 
        .Q(Cosine[9]))
             /* synthesis GSR="ENABLED" */;

    FD1P3DX FF_2 (.D(cosout_pre_10), .SP(ClkEn), .CK(Clock), .CD(Reset), 
        .Q(Cosine[10]))
             /* synthesis GSR="ENABLED" */;

    FD1P3DX FF_1 (.D(cosout_pre_11), .SP(ClkEn), .CK(Clock), .CD(Reset), 
        .Q(Cosine[11]))
             /* synthesis GSR="ENABLED" */;

    FD1P3DX FF_0 (.D(cosout_pre_12), .SP(ClkEn), .CK(Clock), .CD(Reset), 
        .Q(Cosine[12]))
             /* synthesis GSR="ENABLED" */;

    FADD2B neg_rom_addr0_r_n_0 (.A0(scuba_vlo), .A1(rom_addr0_r_inv), .B0(scuba_vlo), 
        .B1(scuba_vhi), .CI(scuba_vlo), .COUT(co0), .S0(), .S1(rom_addr0_r_n));

    FADD2B neg_rom_addr0_r_n_1 (.A0(rom_addr0_r_1_inv), .A1(rom_addr0_r_2_inv), 
        .B0(scuba_vlo), .B1(scuba_vlo), .CI(co0), .COUT(co1), .S0(rom_addr0_r_n_1), 
        .S1(rom_addr0_r_n_2));

    FADD2B neg_rom_addr0_r_n_2 (.A0(rom_addr0_r_3_inv), .A1(rom_addr0_r_4_inv), 
        .B0(scuba_vlo), .B1(scuba_vlo), .CI(co1), .COUT(co2), .S0(rom_addr0_r_n_3), 
        .S1(rom_addr0_r_n_4));

    FADD2B neg_rom_addr0_r_n_3 (.A0(rom_addr0_r_5_inv), .A1(scuba_vlo), 
        .B0(scuba_vlo), .B1(scuba_vlo), .CI(co2), .COUT(), .S0(rom_addr0_r_n_5), 
        .S1());

    defparam triglut_1_0_25.initval =  64'h0000000000000000 ;
    ROM64X1A triglut_1_0_25 (.AD5(rom_addr0_r_11), .AD4(rom_addr0_r_10), 
        .AD3(rom_addr0_r_9), .AD2(rom_addr0_r_8), .AD1(rom_addr0_r_7), .AD0(rom_addr0_r_6), 
        .DO0(rom_dout_12_ffin));

    defparam triglut_1_0_24.initval =  64'h0000000000000000 ;
    ROM64X1A triglut_1_0_24 (.AD5(rom_addr0_r_11), .AD4(rom_addr0_r_10), 
        .AD3(rom_addr0_r_9), .AD2(rom_addr0_r_8), .AD1(rom_addr0_r_7), .AD0(rom_addr0_r_6), 
        .DO0(rom_dout_11_ffin));

    defparam triglut_1_0_23.initval =  64'hFFFFFFFFFFC00000 ;
    ROM64X1A triglut_1_0_23 (.AD5(rom_addr0_r_11), .AD4(rom_addr0_r_10), 
        .AD3(rom_addr0_r_9), .AD2(rom_addr0_r_8), .AD1(rom_addr0_r_7), .AD0(rom_addr0_r_6), 
        .DO0(rom_dout_10_ffin));

    defparam triglut_1_0_22.initval =  64'hFFFFFFF8003FF800 ;
    ROM64X1A triglut_1_0_22 (.AD5(rom_addr0_r_11), .AD4(rom_addr0_r_10), 
        .AD3(rom_addr0_r_9), .AD2(rom_addr0_r_8), .AD1(rom_addr0_r_7), .AD0(rom_addr0_r_6), 
        .DO0(rom_dout_9_ffin));

    defparam triglut_1_0_21.initval =  64'hFFFFF007F03F07C0 ;
    ROM64X1A triglut_1_0_21 (.AD5(rom_addr0_r_11), .AD4(rom_addr0_r_10), 
        .AD3(rom_addr0_r_9), .AD2(rom_addr0_r_8), .AD1(rom_addr0_r_7), .AD0(rom_addr0_r_6), 
        .DO0(rom_dout_8_ffin));

    defparam triglut_1_0_20.initval =  64'hFFFC0F878E38E738 ;
    ROM64X1A triglut_1_0_20 (.AD5(rom_addr0_r_11), .AD4(rom_addr0_r_10), 
        .AD3(rom_addr0_r_9), .AD2(rom_addr0_r_8), .AD1(rom_addr0_r_7), .AD0(rom_addr0_r_6), 
        .DO0(rom_dout_7_ffin));

    defparam triglut_1_0_19.initval =  64'hFFC38E664DB496B4 ;
    ROM64X1A triglut_1_0_19 (.AD5(rom_addr0_r_11), .AD4(rom_addr0_r_10), 
        .AD3(rom_addr0_r_9), .AD2(rom_addr0_r_8), .AD1(rom_addr0_r_7), .AD0(rom_addr0_r_6), 
        .DO0(rom_dout_6_ffin));

    defparam triglut_1_0_18.initval =  64'hFE3369552926CC66 ;
    ROM64X1A triglut_1_0_18 (.AD5(rom_addr0_r_11), .AD4(rom_addr0_r_10), 
        .AD3(rom_addr0_r_9), .AD2(rom_addr0_r_8), .AD1(rom_addr0_r_7), .AD0(rom_addr0_r_6), 
        .DO0(rom_dout_5_ffin));

    defparam triglut_1_0_17.initval =  64'hF92ACC00736B55AA ;
    ROM64X1A triglut_1_0_17 (.AD5(rom_addr0_r_11), .AD4(rom_addr0_r_10), 
        .AD3(rom_addr0_r_9), .AD2(rom_addr0_r_8), .AD1(rom_addr0_r_7), .AD0(rom_addr0_r_6), 
        .DO0(rom_dout_4_ffin));

    defparam triglut_1_0_16.initval =  64'hE59C54FF6ACE00F0 ;
    ROM64X1A triglut_1_0_16 (.AD5(rom_addr0_r_11), .AD4(rom_addr0_r_10), 
        .AD3(rom_addr0_r_9), .AD2(rom_addr0_r_8), .AD1(rom_addr0_r_7), .AD0(rom_addr0_r_6), 
        .DO0(rom_dout_3_ffin));

    defparam triglut_1_0_15.initval =  64'hD0A33D7CCC5600CC ;
    ROM64X1A triglut_1_0_15 (.AD5(rom_addr0_r_11), .AD4(rom_addr0_r_10), 
        .AD3(rom_addr0_r_9), .AD2(rom_addr0_r_8), .AD1(rom_addr0_r_7), .AD0(rom_addr0_r_6), 
        .DO0(rom_dout_2_ffin));

    defparam triglut_1_0_14.initval =  64'hF6E25BBA73027CAA ;
    ROM64X1A triglut_1_0_14 (.AD5(rom_addr0_r_11), .AD4(rom_addr0_r_10), 
        .AD3(rom_addr0_r_9), .AD2(rom_addr0_r_8), .AD1(rom_addr0_r_7), .AD0(rom_addr0_r_6), 
        .DO0(rom_dout_1_ffin));

    defparam triglut_1_0_13.initval =  64'h894A657E52789278 ;
    ROM64X1A triglut_1_0_13 (.AD5(rom_addr0_r_11), .AD4(rom_addr0_r_10), 
        .AD3(rom_addr0_r_9), .AD2(rom_addr0_r_8), .AD1(rom_addr0_r_7), .AD0(rom_addr0_r_6), 
        .DO0(rom_dout_ffin));

    defparam triglut_1_0_12.initval =  64'h0000000000000000 ;
    ROM64X1A triglut_1_0_12 (.AD5(rom_addr0_r_11), .AD4(rom_addr0_r_10), 
        .AD3(rom_addr0_r_9), .AD2(rom_addr0_r_8), .AD1(rom_addr0_r_7), .AD0(rom_addr0_r_6), 
        .DO0(rom_dout_25_ffin));

    defparam triglut_1_0_11.initval =  64'h0000000000000001 ;
    ROM64X1A triglut_1_0_11 (.AD5(rom_addr0_r_11), .AD4(rom_addr0_r_10), 
        .AD3(rom_addr0_r_9), .AD2(rom_addr0_r_8), .AD1(rom_addr0_r_7), .AD0(rom_addr0_r_6), 
        .DO0(rom_dout_24_ffin));

    defparam triglut_1_0_10.initval =  64'h000007FFFFFFFFFE ;
    ROM64X1A triglut_1_0_10 (.AD5(rom_addr0_r_11), .AD4(rom_addr0_r_10), 
        .AD3(rom_addr0_r_9), .AD2(rom_addr0_r_8), .AD1(rom_addr0_r_7), .AD0(rom_addr0_r_6), 
        .DO0(rom_dout_23_ffin));

    defparam triglut_1_0_9.initval =  64'h003FF8003FFFFFFE ;
    ROM64X1A triglut_1_0_9 (.AD5(rom_addr0_r_11), .AD4(rom_addr0_r_10), 
        .AD3(rom_addr0_r_9), .AD2(rom_addr0_r_8), .AD1(rom_addr0_r_7), .AD0(rom_addr0_r_6), 
        .DO0(rom_dout_22_ffin));

    defparam triglut_1_0_8.initval =  64'h07C1F81FC01FFFFE ;
    ROM64X1A triglut_1_0_8 (.AD5(rom_addr0_r_11), .AD4(rom_addr0_r_10), 
        .AD3(rom_addr0_r_9), .AD2(rom_addr0_r_8), .AD1(rom_addr0_r_7), .AD0(rom_addr0_r_6), 
        .DO0(rom_dout_21_ffin));

    defparam triglut_1_0_7.initval =  64'h39CE38E3C3E07FFE ;
    ROM64X1A triglut_1_0_7 (.AD5(rom_addr0_r_11), .AD4(rom_addr0_r_10), 
        .AD3(rom_addr0_r_9), .AD2(rom_addr0_r_8), .AD1(rom_addr0_r_7), .AD0(rom_addr0_r_6), 
        .DO0(rom_dout_20_ffin));

    defparam triglut_1_0_6.initval =  64'h5AD25B64CCE387FE ;
    ROM64X1A triglut_1_0_6 (.AD5(rom_addr0_r_11), .AD4(rom_addr0_r_10), 
        .AD3(rom_addr0_r_9), .AD2(rom_addr0_r_8), .AD1(rom_addr0_r_7), .AD0(rom_addr0_r_6), 
        .DO0(rom_dout_19_ffin));

    defparam triglut_1_0_5.initval =  64'hCC66C929552D98FE ;
    ROM64X1A triglut_1_0_5 (.AD5(rom_addr0_r_11), .AD4(rom_addr0_r_10), 
        .AD3(rom_addr0_r_9), .AD2(rom_addr0_r_8), .AD1(rom_addr0_r_7), .AD0(rom_addr0_r_6), 
        .DO0(rom_dout_18_ffin));

    defparam triglut_1_0_4.initval =  64'hAB55AD9C0066A93E ;
    ROM64X1A triglut_1_0_4 (.AD5(rom_addr0_r_11), .AD4(rom_addr0_r_10), 
        .AD3(rom_addr0_r_9), .AD2(rom_addr0_r_8), .AD1(rom_addr0_r_7), .AD0(rom_addr0_r_6), 
        .DO0(rom_dout_17_ffin));

    defparam triglut_1_0_3.initval =  64'h1E00E6ADFE54734E ;
    ROM64X1A triglut_1_0_3 (.AD5(rom_addr0_r_11), .AD4(rom_addr0_r_10), 
        .AD3(rom_addr0_r_9), .AD2(rom_addr0_r_8), .AD1(rom_addr0_r_7), .AD0(rom_addr0_r_6), 
        .DO0(rom_dout_16_ffin));

    defparam triglut_1_0_2.initval =  64'h6600D4667D798A16 ;
    ROM64X1A triglut_1_0_2 (.AD5(rom_addr0_r_11), .AD4(rom_addr0_r_10), 
        .AD3(rom_addr0_r_9), .AD2(rom_addr0_r_8), .AD1(rom_addr0_r_7), .AD0(rom_addr0_r_6), 
        .DO0(rom_dout_15_ffin));

    defparam triglut_1_0_1.initval =  64'hAA7C819CBBB48EDE ;
    ROM64X1A triglut_1_0_1 (.AD5(rom_addr0_r_11), .AD4(rom_addr0_r_10), 
        .AD3(rom_addr0_r_9), .AD2(rom_addr0_r_8), .AD1(rom_addr0_r_7), .AD0(rom_addr0_r_6), 
        .DO0(rom_dout_14_ffin));

    defparam triglut_1_0_0.initval =  64'h3C923C94FD4CA522 ;
    ROM64X1A triglut_1_0_0 (.AD5(rom_addr0_r_11), .AD4(rom_addr0_r_10), 
        .AD3(rom_addr0_r_9), .AD2(rom_addr0_r_8), .AD1(rom_addr0_r_7), .AD0(rom_addr0_r_6), 
        .DO0(rom_dout_13_ffin));

    FADD2B neg_rom_dout_s_n_0 (.A0(scuba_vlo), .A1(rom_dout_inv), .B0(scuba_vlo), 
        .B1(scuba_vhi), .CI(scuba_vlo), .COUT(co0_1), .S0(), .S1(rom_dout_s_n));

    FADD2B neg_rom_dout_s_n_1 (.A0(rom_dout_1_inv), .A1(rom_dout_2_inv), 
        .B0(scuba_vlo), .B1(scuba_vlo), .CI(co0_1), .COUT(co1_1), .S0(rom_dout_s_n_1), 
        .S1(rom_dout_s_n_2));

    FADD2B neg_rom_dout_s_n_2 (.A0(rom_dout_3_inv), .A1(rom_dout_4_inv), 
        .B0(scuba_vlo), .B1(scuba_vlo), .CI(co1_1), .COUT(co2_1), .S0(rom_dout_s_n_3), 
        .S1(rom_dout_s_n_4));

    FADD2B neg_rom_dout_s_n_3 (.A0(rom_dout_5_inv), .A1(rom_dout_6_inv), 
        .B0(scuba_vlo), .B1(scuba_vlo), .CI(co2_1), .COUT(co3), .S0(rom_dout_s_n_5), 
        .S1(rom_dout_s_n_6));

    FADD2B neg_rom_dout_s_n_4 (.A0(rom_dout_7_inv), .A1(rom_dout_8_inv), 
        .B0(scuba_vlo), .B1(scuba_vlo), .CI(co3), .COUT(co4), .S0(rom_dout_s_n_7), 
        .S1(rom_dout_s_n_8));

    FADD2B neg_rom_dout_s_n_5 (.A0(rom_dout_9_inv), .A1(rom_dout_10_inv), 
        .B0(scuba_vlo), .B1(scuba_vlo), .CI(co4), .COUT(co5), .S0(rom_dout_s_n_9), 
        .S1(rom_dout_s_n_10));

    FADD2B neg_rom_dout_s_n_6 (.A0(rom_dout_11_inv), .A1(rom_dout_12_inv), 
        .B0(scuba_vlo), .B1(scuba_vlo), .CI(co5), .COUT(co6), .S0(rom_dout_s_n_11), 
        .S1(rom_dout_s_n_12));

    FADD2B neg_rom_dout_s_nd (.A0(scuba_vlo), .A1(scuba_vlo), .B0(scuba_vlo), 
        .B1(scuba_vlo), .CI(co6), .COUT(), .S0(co6d), .S1());

    VHI scuba_vhi_inst (.Z(scuba_vhi));

    FADD2B neg_rom_dout_c_n_0 (.A0(scuba_vlo), .A1(rom_dout_13_inv), .B0(scuba_vlo), 
        .B1(scuba_vhi), .CI(scuba_vlo), .COUT(co0_2), .S0(), .S1(rom_dout_c_n));

    FADD2B neg_rom_dout_c_n_1 (.A0(rom_dout_14_inv), .A1(rom_dout_15_inv), 
        .B0(scuba_vlo), .B1(scuba_vlo), .CI(co0_2), .COUT(co1_2), .S0(rom_dout_c_n_1), 
        .S1(rom_dout_c_n_2));

    FADD2B neg_rom_dout_c_n_2 (.A0(rom_dout_16_inv), .A1(rom_dout_17_inv), 
        .B0(scuba_vlo), .B1(scuba_vlo), .CI(co1_2), .COUT(co2_2), .S0(rom_dout_c_n_3), 
        .S1(rom_dout_c_n_4));

    FADD2B neg_rom_dout_c_n_3 (.A0(rom_dout_18_inv), .A1(rom_dout_19_inv), 
        .B0(scuba_vlo), .B1(scuba_vlo), .CI(co2_2), .COUT(co3_1), .S0(rom_dout_c_n_5), 
        .S1(rom_dout_c_n_6));

    FADD2B neg_rom_dout_c_n_4 (.A0(rom_dout_20_inv), .A1(rom_dout_21_inv), 
        .B0(scuba_vlo), .B1(scuba_vlo), .CI(co3_1), .COUT(co4_1), .S0(rom_dout_c_n_7), 
        .S1(rom_dout_c_n_8));

    FADD2B neg_rom_dout_c_n_5 (.A0(rom_dout_22_inv), .A1(rom_dout_23_inv), 
        .B0(scuba_vlo), .B1(scuba_vlo), .CI(co4_1), .COUT(co5_1), .S0(rom_dout_c_n_9), 
        .S1(rom_dout_c_n_10));

    FADD2B neg_rom_dout_c_n_6 (.A0(rom_dout_24_inv), .A1(rom_dout_25_inv), 
        .B0(scuba_vlo), .B1(scuba_vlo), .CI(co5_1), .COUT(co6_1), .S0(rom_dout_c_n_11), 
        .S1(rom_dout_c_n_12));

    VLO scuba_vlo_inst (.Z(scuba_vlo));

    FADD2B neg_rom_dout_c_nd (.A0(scuba_vlo), .A1(scuba_vlo), .B0(scuba_vlo), 
        .B1(scuba_vlo), .CI(co6_1), .COUT(), .S0(co6_1d), .S1());



    // exemplar begin
    // exemplar attribute FF_62 GSR ENABLED
    // exemplar attribute FF_61 GSR ENABLED
    // exemplar attribute FF_60 GSR ENABLED
    // exemplar attribute FF_59 GSR ENABLED
    // exemplar attribute FF_58 GSR ENABLED
    // exemplar attribute FF_57 GSR ENABLED
    // exemplar attribute FF_56 GSR ENABLED
    // exemplar attribute FF_55 GSR ENABLED
    // exemplar attribute FF_54 GSR ENABLED
    // exemplar attribute FF_53 GSR ENABLED
    // exemplar attribute FF_52 GSR ENABLED
    // exemplar attribute FF_51 GSR ENABLED
    // exemplar attribute FF_50 GSR ENABLED
    // exemplar attribute FF_49 GSR ENABLED
    // exemplar attribute FF_48 GSR ENABLED
    // exemplar attribute FF_47 GSR ENABLED
    // exemplar attribute FF_46 GSR ENABLED
    // exemplar attribute FF_45 GSR ENABLED
    // exemplar attribute FF_44 GSR ENABLED
    // exemplar attribute FF_43 GSR ENABLED
    // exemplar attribute FF_42 GSR ENABLED
    // exemplar attribute FF_41 GSR ENABLED
    // exemplar attribute FF_40 GSR ENABLED
    // exemplar attribute FF_39 GSR ENABLED
    // exemplar attribute FF_38 GSR ENABLED
    // exemplar attribute FF_37 GSR ENABLED
    // exemplar attribute FF_36 GSR ENABLED
    // exemplar attribute FF_35 GSR ENABLED
    // exemplar attribute FF_34 GSR ENABLED
    // exemplar attribute FF_33 GSR ENABLED
    // exemplar attribute FF_32 GSR ENABLED
    // exemplar attribute FF_31 GSR ENABLED
    // exemplar attribute FF_30 GSR ENABLED
    // exemplar attribute FF_29 GSR ENABLED
    // exemplar attribute FF_28 GSR ENABLED
    // exemplar attribute FF_27 GSR ENABLED
    // exemplar attribute FF_26 GSR ENABLED
    // exemplar attribute FF_25 GSR ENABLED
    // exemplar attribute FF_24 GSR ENABLED
    // exemplar attribute FF_23 GSR ENABLED
    // exemplar attribute FF_22 GSR ENABLED
    // exemplar attribute FF_21 GSR ENABLED
    // exemplar attribute FF_20 GSR ENABLED
    // exemplar attribute FF_19 GSR ENABLED
    // exemplar attribute FF_18 GSR ENABLED
    // exemplar attribute FF_17 GSR ENABLED
    // exemplar attribute FF_16 GSR ENABLED
    // exemplar attribute FF_15 GSR ENABLED
    // exemplar attribute FF_14 GSR ENABLED
    // exemplar attribute FF_13 GSR ENABLED
    // exemplar attribute FF_12 GSR ENABLED
    // exemplar attribute FF_11 GSR ENABLED
    // exemplar attribute FF_10 GSR ENABLED
    // exemplar attribute FF_9 GSR ENABLED
    // exemplar attribute FF_8 GSR ENABLED
    // exemplar attribute FF_7 GSR ENABLED
    // exemplar attribute FF_6 GSR ENABLED
    // exemplar attribute FF_5 GSR ENABLED
    // exemplar attribute FF_4 GSR ENABLED
    // exemplar attribute FF_3 GSR ENABLED
    // exemplar attribute FF_2 GSR ENABLED
    // exemplar attribute FF_1 GSR ENABLED
    // exemplar attribute FF_0 GSR ENABLED
    // exemplar end

endmodule