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lavine/OpenTSN4.0 forked from opentsn/OpenTSN4.0

OpenTSN4.0开源项目的新特性：（1）交换平面深度解耦，硬件代码由TSS（时间敏感交换），TSE（时间敏感端），HCP（硬件控制点）和OEM（Opensync MAC）实现。（2）集成了TSN硬件测试工具流量规划生成器TSNBuilder、TSN流量测试仪，用户可根据需要运行OpenTSN4.0交换机、网卡、控制器来进行实验验证。

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lavine/FPGA-RMII-SMII forked from Dr.W.X/FPGA-RMII-SMII

An FPGA-based MII to RMII & SMII converter to connect 100M ethernet PHY chip such as LAN8720 or KSZ8041TLI-S. 基于FPGA的MII转RMII和MII转SMII，用来连接LAN8720、KSZ8041TLI-S等百兆以太网PHY芯片。

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lavine/pythondata-soc-opentitan forked from ic-starter/pythondata-soc-opentitan

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lavine/fpnew forked from ic-starter/fpnew

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lavine/freepdk-45nm forked from ic-starter/freepdk-45nm

nangate standard cell library based on freepdk-45nm process. package customized for mflowgen

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lavine/python-usb-protocol forked from ic-starter/python-usb-protocol

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lavine/litehyperbus forked from ic-starter/litehyperbus

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lavine/opentitan forked from ic-starter/opentitan

fork from lowrisc/OpenTitan and try to make opentitan easy to use.

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lavine/verilog-axi forked from ic-starter/verilog-axi

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lavine/SpinalTemplateSbt forked from ic-starter/SpinalTemplateSbt

fork from github/spinalHDL and try to sync. with its mainline.

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lavine/SpinalHDL-Easy forked from ic-starter/SpinalHDL-Easy

A sbt/scala/SpinalHDL envirement for SpinalHDL development, even w/o internet.

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lavine/FPGA_MCU_SPI_COM forked from themql/FPGA_MCU_SPI_COM

基于SPI的FPGA与MCU简易通讯，以EP4CE15与STM32F407为例

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lavine/USTC-RVSoC forked from Dr.W.X/USTC-RVSoC

An FPGA-based RISC-V CPU+SoC with a simple and extensible peripheral bus. 基于FPGA的RISC-V CPU+SoC，包含一个简单且可扩展的外设总线。

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lavine/FPGA-SDcard-Reader-SPI forked from Dr.W.X/FPGA-SDcard-Reader-SPI

An FPGA-based SD-card reader via SPI bus, which can read files from FAT16 or FAT32 formatted SD-cards. 基于FPGA的SD卡读取器(通过SPI总线)，可以从FAT16或FAT32格式的SD卡中读取文件。

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lavine/FPGA-SDcard-Reader forked from Dr.W.X/FPGA-SDcard-Reader

An FPGA-based SD-card reader to read files from FAT16 or FAT32 formatted SD-cards. 基于FPGA的SD卡读取器，可以从FAT16或FAT32格式的SD卡中读取文件。

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lavine/FPGA-ftdi245fifo forked from Dr.W.X/FPGA-ftdi245fifo

FPGA-based USB fast data transmission using FT232H/FT600 chip. 使用FT232H/FT600芯片进行FPGA与电脑之间的高速数据传输。

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lavine/Verilog-UART forked from Dr.W.X/FPGA-UART

3 independent modules for FPGA: UART receiver, UART transmitter, UART interactive debugger. 3个独立模块：UART接收器、UART发送器、UART交互式调试器。

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lavine/FPGA-USB-Device forked from Dr.W.X/FPGA-USB-Device

基于FPGA的USB full-speed device端控制器，可实现USB串口、USB摄像头、USB音频、U盘、USB键盘等设备，只需要3个FPGA普通IO，而不需要额外的接口芯片。

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lavine/FPGA-CAN forked from Dr.W.X/FPGA-CAN

An FPGA-based lightweight CAN bus controller. 基于FPGA的轻量级CAN总线控制器。

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lavine/mini-c

编译原理大作业，学生编译器项目Mini-C (前端，抽象语法树部分)